Design of pipeline R2MDC FFT for implementation of MIMO OFDM transceivers using FPGA
Số trang: 8
Loại file: pdf
Dung lượng: 2.00 MB
Lượt xem: 16
Lượt tải: 0
Xem trước 2 trang đầu tiên của tài liệu này:
Thông tin tài liệu:
In this paper, an area-efficient low power Fast Fourier Transform (FFT) processor is proposed for Multi Input Multi Output—Orthogonal Frequency Division Multiplexing (MIMO-OFDM) that consists of a modified architecture of radix-2 algorithm which is described as Radix-2 multipath delay commutation (R2MDC). Orthogonal frequencydivision multiplexing is a popular method for high-data-rate wireless transmission.
Nội dung trích xuất từ tài liệu:
Design of pipeline R2MDC FFT for implementation of MIMO OFDM transceivers using FPGA
Nội dung trích xuất từ tài liệu:
Design of pipeline R2MDC FFT for implementation of MIMO OFDM transceivers using FPGA
Tìm kiếm theo từ khóa liên quan:
Radix-2 multipath delay commutation Frequency division multiplexing Multi input multi output Orthogonal frequency division multiplexing Inverse fast fourier transform Fast fourier transformGợi ý tài liệu liên quan:
-
Wireless networks - Lecture 42: IEEE 802.16
20 trang 36 0 0 -
Performance of orthogonal frequency division multiplexing based advanced encryption standard
8 trang 34 0 0 -
Lecture Data communications and computer networks: A business user's approach (8E) - Chapter 5
69 trang 30 0 0 -
High-efficiency jamming signal against UAV/drones
10 trang 29 0 0 -
Ebook MIMO-OFDM wireless communications with Matlab R: Part 1
226 trang 27 0 0 -
Ebook MIMO-OFDM wireless communications with Matlab R: Part 2
231 trang 24 0 0 -
Fast fourier transforms: A tutorial review and a state of the art
51 trang 24 0 0 -
13 trang 22 0 0
-
Window-based alternative filters for f-OFDM in next generation wireless communication systems
11 trang 22 0 0 -
Expectation maximization channel estimation for nonlinear OFDM systems
13 trang 22 0 0